initial commit
[ETG_Helmet] / HARDWARE / helmet__.kicad_pro
1 {
2   "board": {
3     "3dviewports": [],
4     "design_settings": {
5       "defaults": {
6         "board_outline_line_width": 0.15,
7         "copper_line_width": 0.19999999999999998,
8         "copper_text_italic": false,
9         "copper_text_size_h": 1.5,
10         "copper_text_size_v": 1.5,
11         "copper_text_thickness": 0.3,
12         "copper_text_upright": false,
13         "courtyard_line_width": 0.049999999999999996,
14         "dimension_precision": 4,
15         "dimension_units": 3,
16         "dimensions": {
17           "arrow_length": 1270000,
18           "extension_offset": 500000,
19           "keep_text_aligned": true,
20           "suppress_zeroes": false,
21           "text_position": 0,
22           "units_format": 1
23         },
24         "fab_line_width": 0.09999999999999999,
25         "fab_text_italic": false,
26         "fab_text_size_h": 1.0,
27         "fab_text_size_v": 1.0,
28         "fab_text_thickness": 0.15,
29         "fab_text_upright": false,
30         "other_line_width": 0.09999999999999999,
31         "other_text_italic": false,
32         "other_text_size_h": 1.0,
33         "other_text_size_v": 1.0,
34         "other_text_thickness": 0.15,
35         "other_text_upright": false,
36         "pads": {
37           "drill": 0.3,
38           "height": 0.6,
39           "width": 0.6
40         },
41         "silk_line_width": 0.15,
42         "silk_text_italic": false,
43         "silk_text_size_h": 1.0,
44         "silk_text_size_v": 1.0,
45         "silk_text_thickness": 0.15,
46         "silk_text_upright": false,
47         "zones": {
48           "min_clearance": 0.508
49         }
50       },
51       "diff_pair_dimensions": [],
52       "drc_exclusions": [],
53       "meta": {
54         "filename": "board_design_settings.json",
55         "version": 2
56       },
57       "rule_severities": {
58         "annular_width": "error",
59         "clearance": "error",
60         "connection_width": "warning",
61         "copper_edge_clearance": "error",
62         "copper_sliver": "warning",
63         "courtyards_overlap": "error",
64         "diff_pair_gap_out_of_range": "error",
65         "diff_pair_uncoupled_length_too_long": "error",
66         "drill_out_of_range": "error",
67         "duplicate_footprints": "warning",
68         "extra_footprint": "warning",
69         "footprint": "error",
70         "footprint_type_mismatch": "ignore",
71         "hole_clearance": "error",
72         "hole_near_hole": "error",
73         "invalid_outline": "error",
74         "isolated_copper": "warning",
75         "item_on_disabled_layer": "error",
76         "items_not_allowed": "error",
77         "length_out_of_range": "error",
78         "lib_footprint_issues": "warning",
79         "lib_footprint_mismatch": "warning",
80         "malformed_courtyard": "error",
81         "microvia_drill_out_of_range": "error",
82         "missing_courtyard": "ignore",
83         "missing_footprint": "warning",
84         "net_conflict": "warning",
85         "npth_inside_courtyard": "ignore",
86         "padstack": "warning",
87         "pth_inside_courtyard": "ignore",
88         "shorting_items": "error",
89         "silk_edge_clearance": "warning",
90         "silk_over_copper": "warning",
91         "silk_overlap": "warning",
92         "skew_out_of_range": "error",
93         "solder_mask_bridge": "error",
94         "starved_thermal": "error",
95         "text_height": "warning",
96         "text_thickness": "warning",
97         "through_hole_pad_without_hole": "error",
98         "too_many_vias": "error",
99         "track_dangling": "warning",
100         "track_width": "error",
101         "tracks_crossing": "error",
102         "unconnected_items": "error",
103         "unresolved_variable": "error",
104         "via_dangling": "warning",
105         "zones_intersect": "error"
106       },
107       "rule_severitieslegacy_courtyards_overlap": true,
108       "rule_severitieslegacy_no_courtyard_defined": false,
109       "rules": {
110         "max_error": 0.005,
111         "min_clearance": 0.0,
112         "min_connection": 0.0,
113         "min_copper_edge_clearance": 0.049999999999999996,
114         "min_hole_clearance": 0.25,
115         "min_hole_to_hole": 0.25,
116         "min_microvia_diameter": 0.19999999999999998,
117         "min_microvia_drill": 0.09999999999999999,
118         "min_resolved_spokes": 2,
119         "min_silk_clearance": 0.0,
120         "min_text_height": 0.7999999999999999,
121         "min_text_thickness": 0.08,
122         "min_through_hole_diameter": 0.3,
123         "min_track_width": 0.19999999999999998,
124         "min_via_annular_width": 0.09999999999999999,
125         "min_via_diameter": 0.39999999999999997,
126         "solder_mask_to_copper_clearance": 0.0,
127         "use_height_for_length_calcs": true
128       },
129       "teardrop_options": [
130         {
131           "td_allow_use_two_tracks": true,
132           "td_curve_segcount": 5,
133           "td_on_pad_in_zone": false,
134           "td_onpadsmd": true,
135           "td_onroundshapesonly": false,
136           "td_ontrackend": false,
137           "td_onviapad": true
138         }
139       ],
140       "teardrop_parameters": [
141         {
142           "td_curve_segcount": 0,
143           "td_height_ratio": 1.0,
144           "td_length_ratio": 0.5,
145           "td_maxheight": 2.0,
146           "td_maxlen": 1.0,
147           "td_target_name": "td_round_shape",
148           "td_width_to_size_filter_ratio": 0.9
149         },
150         {
151           "td_curve_segcount": 0,
152           "td_height_ratio": 1.0,
153           "td_length_ratio": 0.5,
154           "td_maxheight": 2.0,
155           "td_maxlen": 1.0,
156           "td_target_name": "td_rect_shape",
157           "td_width_to_size_filter_ratio": 0.9
158         },
159         {
160           "td_curve_segcount": 0,
161           "td_height_ratio": 1.0,
162           "td_length_ratio": 0.5,
163           "td_maxheight": 2.0,
164           "td_maxlen": 1.0,
165           "td_target_name": "td_track_end",
166           "td_width_to_size_filter_ratio": 0.9
167         }
168       ],
169       "track_widths": [],
170       "via_dimensions": [],
171       "zones_allow_external_fillets": false
172     },
173     "layer_presets": [],
174     "viewports": []
175   },
176   "boards": [],
177   "cvpcb": {
178     "equivalence_files": []
179   },
180   "libraries": {
181     "pinned_footprint_libs": [],
182     "pinned_symbol_libs": []
183   },
184   "meta": {
185     "filename": "helmet__.kicad_pro",
186     "version": 1
187   },
188   "net_settings": {
189     "classes": [
190       {
191         "bus_width": 12,
192         "clearance": 0.2,
193         "diff_pair_gap": 0.25,
194         "diff_pair_via_gap": 0.25,
195         "diff_pair_width": 0.2,
196         "line_style": 0,
197         "microvia_diameter": 0.3,
198         "microvia_drill": 0.1,
199         "name": "Default",
200         "pcb_color": "rgba(0, 0, 0, 0.000)",
201         "schematic_color": "rgba(0, 0, 0, 0.000)",
202         "track_width": 0.25,
203         "via_diameter": 0.6,
204         "via_drill": 0.4,
205         "wire_width": 6
206       },
207       {
208         "bus_width": 12,
209         "clearance": 0.2,
210         "diff_pair_gap": 0.25,
211         "diff_pair_via_gap": 0.25,
212         "diff_pair_width": 0.2,
213         "line_style": 0,
214         "microvia_diameter": 0.3,
215         "microvia_drill": 0.1,
216         "name": "3.3v",
217         "pcb_color": "rgba(0, 0, 0, 0.000)",
218         "schematic_color": "rgba(0, 0, 0, 0.000)",
219         "track_width": 0.5,
220         "via_diameter": 0.6,
221         "via_drill": 0.4,
222         "wire_width": 6
223       },
224       {
225         "bus_width": 12,
226         "clearance": 0.2,
227         "diff_pair_gap": 0.25,
228         "diff_pair_via_gap": 0.25,
229         "diff_pair_width": 0.2,
230         "line_style": 0,
231         "microvia_diameter": 0.3,
232         "microvia_drill": 0.1,
233         "name": "5v",
234         "pcb_color": "rgba(0, 0, 0, 0.000)",
235         "schematic_color": "rgba(0, 0, 0, 0.000)",
236         "track_width": 0.7,
237         "via_diameter": 0.7,
238         "via_drill": 0.4,
239         "wire_width": 6
240       },
241       {
242         "bus_width": 12,
243         "clearance": 0.2,
244         "diff_pair_gap": 0.25,
245         "diff_pair_via_gap": 0.25,
246         "diff_pair_width": 0.2,
247         "line_style": 0,
248         "microvia_diameter": 0.3,
249         "microvia_drill": 0.1,
250         "name": "GND",
251         "pcb_color": "rgba(0, 0, 0, 0.000)",
252         "schematic_color": "rgba(0, 0, 0, 0.000)",
253         "track_width": 0.5,
254         "via_diameter": 0.6,
255         "via_drill": 0.4,
256         "wire_width": 6
257       }
258     ],
259     "meta": {
260       "version": 3
261     },
262     "net_colors": null,
263     "netclass_assignments": null,
264     "netclass_patterns": [
265       {
266         "netclass": "Default",
267         "pattern": "/A2"
268       },
269       {
270         "netclass": "Default",
271         "pattern": "/D+"
272       },
273       {
274         "netclass": "Default",
275         "pattern": "/D-"
276       },
277       {
278         "netclass": "Default",
279         "pattern": "/L"
280       },
281       {
282         "netclass": "Default",
283         "pattern": "/SCL"
284       },
285       {
286         "netclass": "Default",
287         "pattern": "/SDA"
288       },
289       {
290         "netclass": "Default",
291         "pattern": "Net-(D1-Pad2)"
292       },
293       {
294         "netclass": "Default",
295         "pattern": "Net-(D2-Pad1)"
296       },
297       {
298         "netclass": "Default",
299         "pattern": "Net-(D2-Pad2)"
300       },
301       {
302         "netclass": "Default",
303         "pattern": "Net-(D3-Pad2)"
304       },
305       {
306         "netclass": "Default",
307         "pattern": "Net-(J1-Pad2)"
308       },
309       {
310         "netclass": "Default",
311         "pattern": "Net-(J1-Pad4)"
312       },
313       {
314         "netclass": "Default",
315         "pattern": "Net-(J1-Pad7)"
316       },
317       {
318         "netclass": "Default",
319         "pattern": "Net-(J1-Pad8)"
320       },
321       {
322         "netclass": "Default",
323         "pattern": "Net-(J2-Pad1)"
324       },
325       {
326         "netclass": "Default",
327         "pattern": "Net-(J2-Pad10)"
328       },
329       {
330         "netclass": "Default",
331         "pattern": "Net-(J2-Pad11)"
332       },
333       {
334         "netclass": "Default",
335         "pattern": "Net-(J2-Pad12)"
336       },
337       {
338         "netclass": "Default",
339         "pattern": "Net-(J2-Pad13)"
340       },
341       {
342         "netclass": "Default",
343         "pattern": "Net-(J2-Pad15)"
344       },
345       {
346         "netclass": "Default",
347         "pattern": "Net-(J2-Pad17)"
348       },
349       {
350         "netclass": "Default",
351         "pattern": "Net-(J2-Pad19)"
352       },
353       {
354         "netclass": "Default",
355         "pattern": "Net-(J2-Pad2)"
356       },
357       {
358         "netclass": "Default",
359         "pattern": "Net-(J2-Pad21)"
360       },
361       {
362         "netclass": "Default",
363         "pattern": "Net-(J2-Pad22)"
364       },
365       {
366         "netclass": "Default",
367         "pattern": "Net-(J2-Pad23)"
368       },
369       {
370         "netclass": "Default",
371         "pattern": "Net-(J2-Pad24)"
372       },
373       {
374         "netclass": "Default",
375         "pattern": "Net-(J2-Pad25)"
376       },
377       {
378         "netclass": "Default",
379         "pattern": "Net-(J2-Pad26)"
380       },
381       {
382         "netclass": "Default",
383         "pattern": "Net-(J2-Pad27)"
384       },
385       {
386         "netclass": "Default",
387         "pattern": "Net-(J2-Pad28)"
388       },
389       {
390         "netclass": "Default",
391         "pattern": "Net-(J2-Pad29)"
392       },
393       {
394         "netclass": "Default",
395         "pattern": "Net-(J2-Pad30)"
396       },
397       {
398         "netclass": "Default",
399         "pattern": "Net-(J2-Pad31)"
400       },
401       {
402         "netclass": "Default",
403         "pattern": "Net-(J2-Pad32)"
404       },
405       {
406         "netclass": "Default",
407         "pattern": "Net-(J2-Pad33)"
408       },
409       {
410         "netclass": "Default",
411         "pattern": "Net-(J2-Pad34)"
412       },
413       {
414         "netclass": "Default",
415         "pattern": "Net-(J2-Pad36)"
416       },
417       {
418         "netclass": "Default",
419         "pattern": "Net-(J2-Pad38)"
420       },
421       {
422         "netclass": "Default",
423         "pattern": "Net-(J2-Pad40)"
424       },
425       {
426         "netclass": "Default",
427         "pattern": "Net-(J2-Pad6)"
428       },
429       {
430         "netclass": "Default",
431         "pattern": "Net-(J2-Pad8)"
432       },
433       {
434         "netclass": "Default",
435         "pattern": "Net-(J3-Pad6)"
436       },
437       {
438         "netclass": "Default",
439         "pattern": "Net-(J4-Pad6)"
440       },
441       {
442         "netclass": "Default",
443         "pattern": "Net-(J7-Pad2)"
444       },
445       {
446         "netclass": "Default",
447         "pattern": "Net-(J7-Pad3)"
448       },
449       {
450         "netclass": "Default",
451         "pattern": "Net-(JP1-Pad2)"
452       },
453       {
454         "netclass": "Default",
455         "pattern": "Net-(JP3-Pad1)"
456       },
457       {
458         "netclass": "Default",
459         "pattern": "Net-(JP5-Pad2)"
460       },
461       {
462         "netclass": "Default",
463         "pattern": "Net-(JP6-Pad2)"
464       },
465       {
466         "netclass": "Default",
467         "pattern": "Net-(JP7-Pad1)"
468       },
469       {
470         "netclass": "Default",
471         "pattern": "Net-(R1-Pad1)"
472       },
473       {
474         "netclass": "Default",
475         "pattern": "Net-(R10-Pad2)"
476       },
477       {
478         "netclass": "Default",
479         "pattern": "Net-(R2-Pad1)"
480       },
481       {
482         "netclass": "Default",
483         "pattern": "Net-(R3-Pad1)"
484       },
485       {
486         "netclass": "Default",
487         "pattern": "Net-(R4-Pad1)"
488       },
489       {
490         "netclass": "Default",
491         "pattern": "Net-(R5-Pad1)"
492       },
493       {
494         "netclass": "Default",
495         "pattern": "Net-(R6-Pad1)"
496       },
497       {
498         "netclass": "Default",
499         "pattern": "Net-(R7-Pad1)"
500       },
501       {
502         "netclass": "Default",
503         "pattern": "Net-(R8-Pad1)"
504       },
505       {
506         "netclass": "Default",
507         "pattern": "Net-(R9-Pad2)"
508       },
509       {
510         "netclass": "Default",
511         "pattern": "Net-(SW9-Pad2)"
512       },
513       {
514         "netclass": "Default",
515         "pattern": "Net-(U1-PadA11)"
516       },
517       {
518         "netclass": "Default",
519         "pattern": "Net-(U1-PadA12)"
520       },
521       {
522         "netclass": "Default",
523         "pattern": "Net-(U1-PadA13)"
524       },
525       {
526         "netclass": "Default",
527         "pattern": "Net-(U1-PadA14)"
528       },
529       {
530         "netclass": "Default",
531         "pattern": "Net-(U1-PadB10)"
532       },
533       {
534         "netclass": "Default",
535         "pattern": "Net-(U1-PadB11)"
536       },
537       {
538         "netclass": "Default",
539         "pattern": "Net-(U1-PadB12)"
540       },
541       {
542         "netclass": "Default",
543         "pattern": "Net-(U1-PadB8)"
544       },
545       {
546         "netclass": "Default",
547         "pattern": "Net-(U1-PadB9)"
548       },
549       {
550         "netclass": "3.3v",
551         "pattern": "/3.3v"
552       },
553       {
554         "netclass": "3.3v",
555         "pattern": "Net-(C1-Pad1)"
556       },
557       {
558         "netclass": "3.3v",
559         "pattern": "Net-(L1-Pad2)"
560       },
561       {
562         "netclass": "5v",
563         "pattern": "/5v"
564       },
565       {
566         "netclass": "5v",
567         "pattern": "/BATT"
568       },
569       {
570         "netclass": "5v",
571         "pattern": "Net-(J3-Pad3)"
572       },
573       {
574         "netclass": "GND",
575         "pattern": "GNDD"
576       }
577     ]
578   },
579   "pcbnew": {
580     "last_paths": {
581       "gencad": "",
582       "idf": "",
583       "netlist": "",
584       "specctra_dsn": "",
585       "step": "",
586       "vrml": ""
587     },
588     "page_layout_descr_file": ""
589   },
590   "schematic": {
591     "drawing": {
592       "label_size_ratio": 0.25,
593       "pin_symbol_size": 0,
594       "text_offset_ratio": 0.08
595     },
596     "legacy_lib_dir": "",
597     "legacy_lib_list": []
598   },
599   "sheets": [],
600   "text_variables": {}
601 }
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