1 #ifndef _FAST_GPIO_OMEGA2_H_
2 #define _FAST_GPIO_OMEGA2_H_
6 //Define Macros in derived class.
7 #define REG_BLOCK_ADDR 0x10000000
8 #define REG_BLOCK_SIZE 0x6AC
9 //DIRECTION CONTROL REGISTERS
11 //GPIO_CTRL_0 10000600(Directions for GPIO0-GPIO31)
12 #define REGISTER_CTRL0_OFFSET 384
13 //GPIO_CTRL_1 10000604(Directions for GPIO32-GPIO63)
14 #define REGISTER_CTRL1_OFFSET 385
15 //GPIO_CTRL_2 10000608(Directions for GPIO64-GPIO95)
16 #define REGISTER_CTRL2_OFFSET 386
18 //DATA REGISTERS: STATES OF GPIOS
20 //GPIO_DATA_0 10000620(GPIO0-31)
21 #define REGISTER_DATA0_OFFSET 392
22 //GPIO_DATA_1 10000624(GPIO32-63)
23 #define REGISTER_DATA1_OFFSET 393
24 //GPIO_DATA_2 10000628(GPIO64-95)
25 #define REGISTER_DATA2_OFFSET 394
27 //DATA SET REGISTERS: SET STATES OF GPIO_DATA_x registers
29 //GPIO_DSET_0 10000630(GPIO0-31)
30 #define REGISTER_DSET0_OFFSET 396
31 //GPIO_DSET_1 10000634(GPIO31-63)
32 #define REGISTER_DSET1_OFFSET 397
33 //GPIO_DSET_2 10000638(GPIO64-95)
34 #define REGISTER_DSET2_OFFSET 398
36 //DATA CLEAR REGISTERS: CLEAR BITS OF GPIO_DATA_x registers
38 //GPIO_DCLR_0 10000640(GPIO0-31)
39 #define REGISTER_DCLR0_OFFSET 400
40 //GPIO_DCLR_1 10000644(GPIO31-63)
41 #define REGISTER_DCLR1_OFFSET 401
42 //GPIO_DCLR_2 10000648(GPIO64-95)
43 #define REGISTER_DCLR2_OFFSET 402
45 // extern unsigned long int fullRegister;
47 class FastGpioOmega2 : public FastGpio {
50 ~FastGpioOmega2(void);
52 int SetDirection (int pinNum, int bOutput);
53 int GetDirection (int pinNum, int &bOutput);
55 int Set (int pinNum, int value);
56 int Read (int pinNum, int &value);
57 unsigned long int ReadFull (int pinNum, int &value);
66 void setGpioOffset(int gpio);//Populates the offset private members above depending on selected GPIO
70 #endif // _FAST_GPIO_OMEGA2_H_